ESREF 2022

33rd European Symposium on Reliability of Electron
Devices Failure Physics and Analysis

September 26-29, 2022

Velektronik: Analysis 4 Trusted Electronics

 

 Berlin, Germany. Tuesday 27th September 2022.

Day 1 of the ESREF Conference, onsite / Address: At H4 Hotel, Berlin 

Today’s society depends increasingly and in many aspects on the availability of trusted microelectronics. The supply chains for systems are very complex and global. In this supply chain there are several options that counterfeit and manipulated devices could compromise security of information as well as safety and reliability even in critical application and infrastructure. The availability of effective and efficient analysis methods, tools and work flows for active and passive components and assemblies in a Zero Trust philosophy is becoming a cornerstone. The challenge posed by scaling technologies and  heterointegration is increasing and modern tools for failure analysis are becoming an critical asset for verifying authenticity. The workshop brings together experts from industry, academia and government to discuss demands, challenges and experiences in the field of analysis for trusted electronics and is organized by “Velektronik” platform, which is funded by BMBF and coordinated by the office of the Forschungsfabrik Mikroelektronik Deutschland (FMD).

Key topics are:

  • Classes of Trust
  • Analysis Methods
  • Attack Vectors

4 Sessions:

  1. Hardware Security
  2. Counterfeit Detection
  3. Physical Unclonable Functions
  4. Trojan Detection

We encourage experts from industry, governmental agencies as well as students to participate. The event will provide a great opportunity to network with representatives from all over Europe.

There is also the opportunity to join the ESREF event. The ESREF international symposium continues to focus on the newest developments and future prospects for quality and reliability management of materials, devices, and circuits for micro-, nano-, and optoelectronics.

More Information

Horst Gieser (horst.gieser@emft.fraunhofer.de)

Altmann, Frank (frank.altmann@imws.fraunhofer.de)

Session I: Hardware Security

09:00 – 09:20 am I Introduction & Workshop Goals
Horst Gieser, Fraunhofer EMFT und Frank Altmann, Fraunhofer IMWS

09:20 – 09:40 am I Optical attacks on the IC and methods to protect the IC backside
Elham Amini, Tuba Kiyan , TU Berlin

09:40 – 10:00 am I Backside E Beam probing methods for functional analysis and attacks of sub 20nm nodes
Jörg Jatzkowski, Fraunhofer IMWS

10:00 – 10:20 am I A versatile, low-cost microscope for optical side channel and failure analysis
Enrico Dietz, German Aerospace Center Institute of Optical Sensor Systems (DLR)

10:20 – 10:40 am I Discussion

10:40 – 11:20 am I Coffee Break

Session II: Counterfeit Detection

11:20 – 11:40 am I Securing a multiple source supply chain
Matthias Lewicky, Zollner Elektronik AG

11:40 am – 12:00 pm I Analysis techniques for counterfeit detection
Frank Altmann, Fraunhofer IMWS

12:00 – 12:20 pm I Hardware analysis of identification structures in printed circuit boards and assemblies
Christoph Lehnberger, Andus Electronic GmbH

12:20 – 12:40 pm I Examples for counterfeit detection
Horst Gieser, Fraunhofer EMFT

12:40 – 01:00 pm I Discussion

01:00 – 02:00 pm I Lunch Break    

Session III: PUFs

02:00 – 02:20 pm I PUFs: Overview and design challenges
Robert Hesselbarth, Fraunhofer AISEC

02:20 – 02:40 pm I MEMS Fingerprinting for Hardware Security (VIDES)
Katja Meinel, Fraunhofer ENAS

02:40 – 03:00 pm I Image correlation-based self-authentication and identification of valuable objects, products and documents based on stochastic markings
Ralf Döring, Chemnitzer Werkstoffmechanik GmbH

03:00 – 03:20 pm I Enabling trustworthiness of an electronic device along the supply chain
Daniel Schneider, Siemens AG

03:20 – 03:40 pm I Discussion

03:40 – 04:20 pm I Coffee Break      

Session IV: IC Trojan Detection

04:20 – 04:40 pm I Physical Verification of IOT Devices
Bernhard Lippmann, Infineon AG

04:40 – 05:00 pm I ZEISS MultiSEM: towards Full Chip Scanning in Semiconductor Reverse Engineering
Stephan Nickell, ZEISS MulitSEM GmbH

05:00 – 05:30 pm I Discussion and Wrap-Up